Video signal conversion device

ABSTRACT

A video signal conversion device includes a frontend interface circuit, a FPGA video processor and a backend interface circuit. The frontend interface circuit receives a HDR video input signal from a video transmitting device. The FPGA video processor outputs a SDR first video output signal. A video receiving device receives the first video output signal and a HDR second video output signal from the FPGA video processor through the video bridge controller of the backend interface circuit by PCI-E.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a continuation application of U.S. application Ser.No. 17/095,779 filed Nov. 12, 2020, which is a divisional application ofU.S. application Ser. No. 16/395,393 filed Apr. 26, 2019, which claimspriority to Taiwan Application No. 107114650 filed Apr. 30, 2018.

BACKGROUND 1. Technical Field

The present invention generally relates to a conversion device, and moreparticularly, to a video conversion device.

2. Description of Related Art

At present, the high dynamic range (HDR) video is getting more and moreaccepted by the frontend video source device, for example, the videogame console PS4 have output game video supporting HDR format. Atpresent, however, in the design of the video product, the backend videomanufacturers do not consider whether backend video recovering endsupports the HDR formation, for example, during video recording, displayand other video application. In this case, for example, when the signalfrom the frontend to backend (a video receiving end) is the video signalof HDR format but the backend (the video receiving end) does not supportthe HDR format, the user may easily become aware that the video formatfails to meet the caused color anomaly.

Therefore, it is obvious that existing video transmitting device has theproblems to be solved.

SUMMARY OF THE INVENTION

The present invention is to provide a video signal conversion device,which is cooperated with a video transmitting device and a videoreceiving device. The video signal conversion device includes a frontendcircuit, a FPGA video processor and a backend circuit. The frontendcircuit is electrically connected with the video transmitting device toreceive the video input signal from the video transmitting device, wherethe video input signal is HDR signal. The FPGA video processor iselectrically connected with the frontend circuit. According to the videoinput signal, the FPGA video processor outputs a first video outputsignal, and the first video output signal is SDR signal. The backendcircuit is electrically connected with the FPGA video processor and thevideo receiving device respectively, wherein, the backend circuitincludes a video bridge controller, the video bridge controller is PCI-EBUS, and the video receiving device meets PCI-E BUS format by the videobridge controller to receive the first video output signal from the FPGAvideo processor.

Therefore, according to the technical content of the invention, thevideo signal conversion device can more fully solve the problems thatthe backend video receiving end does not support HDR or the backendvideo receiving end requires SDR.

The detailed technology and preferred embodiments implemented for thesubject invention are described in the following paragraphs accompanyingthe appended drawings for people skilled in this field to wellappreciate the features of the claimed invention.

BRIEF DESCRIPTION OF THE DRAWINGS

The parts in the drawings are not necessarily drawn to scale, theemphasis instead being placed upon clearly illustrating the principlesof at least one embodiment. In the drawings, like reference numeralsdesignate corresponding parts throughout the various diagrams, and allthe diagrams are schematic.

FIG. 1 is a schematic diagram showing a video signal conversion deviceaccording to a first embodiment of the invention.

FIG. 2 is a schematic diagram showing a frontend interface of the videosignal conversion device according to the first embodiment of theinvention.

FIG. 3 is a schematic diagram showing a video signal conversion deviceaccording to a second embodiment of the invention.

FIG. 4 is a schematic diagram showing a video signal conversion deviceaccording to a third embodiment of the invention.

FIG. 5 is a schematic diagram showing a video signal conversion deviceaccording to a fourth embodiment of the invention.

FIG. 6 is a schematic diagram showing a video signal conversion deviceaccording to a fifth embodiment of the invention.

DETAILED DESCRIPTION

Reference will now be made to the drawings to describe various inventiveembodiments of the present disclosure in detail, wherein like numeralsrefer to like elements throughout.

The terminology used herein is for the purpose of describing theparticular embodiment and is not intended to limit the application. Thesingular forms “a”, “an”, “the”, “this” and “these” may also include theplural.

As used herein, “the first”, “the second”, etc., are not specificallymeant to refer to the order, nor are they intended to limit theapplication, but are merely used to distinguish elements or operationsthat are described in the same technical terms.

As used herein, “coupled” or “connected” may mean that two or moreelements or devices are directly contacted in physical with each other,or indirectly contacted in physical with each other, may also mean thattwo or more elements or devices operate or interact with each other, andmay also refer to a direct or indirect connection by electrical (orelectrical signals).

As used herein, “including”, “comprising”, “having”, and the like areall open type terms, meaning to include but not limited to.

As used herein, “and/or” includes any one or all combinations of therecited.

Regarding the directional terminology used herein, for example, up,down, left, right, front or back, etc., only refers to the direction ofthe additional drawing. Therefore, the directional terminology used isused to illustrate that it is not intended to limit the application.

The terms used in this specification, unless otherwise noted, usuallyhave the usual meaning of each term used in this field, in the contextof the application, and in particular content. Certain terms used todescribe the present invention are discussed below or elsewhere in thisspecification to provide additional guidance to those skilled in the artin the description of the present invention.

As used herein, “video input signal” and “video output signal” mentionedin this specification refer to signals containing at least videoinformation, and of course, audio and video signals, and there is nolimit here.

A video signal conversion device disclosed in the embodiment may becooperated with a video transmitting device and a video receivingdevice. The video signal conversion device includes a frontendinterface, a video processing module and a backend interface. Thefrontend interface is coupled with the video transmitting device toreceive the video input signal from the video transmitting device, wherethe video input signal is high dynamic range signal. The “high dynamicrange” is hereinafter referred to as HDR. The video processing module iscoupled with the frontend interface. According to the video inputsignal, the video processing module outputs the first video outputsignal, wherein the first video output signal is standard display rangesignal. The “standard display range” is hereinafter referred to as SDR.The backend interface is coupled with the video processing module andthe video receiving device respectively, wherein the video receivingdevice receives the first video output signal from the video processingmodule by the backend interface.

The video transmitting device may send the HDR video input signal atleast, for example, it may only send HDR video input signal, or may sendHDR and/or SDR, or other video input signal. The frontend interface mayhave different designs subject to actual requirement, for example, thevideo processing module may be operated by the frontend interface andreceives the video information of the video input signal from the videotransmitting device for subsequent processing. For example, the frontendinterface may be the frontend circuit. Additionally, the frontendinterface may, for example, include a video receiving device, or a videoshunt, which support HDMI or other format videos respectively. Accordingto the conversion signal, the video processing module may, for example,convert the video information of the video input signal into SDR videoinformation to generate SDR first video output signal. The conversioninformation may be known by comparison tables or real-time operations.For the above conversion, actually, for example, it may be SDR videoinformation obtained by adjusting the video information video conversionformula of the conversion information, and this is only used as exampleand does not limit this invention. The video processing module may beimplemented by software or hardware circuit, for example, a processor, amain control unit (MCU), a system on a chip (SoC), a field programmablegate array (FPGA), etc. The video receiving device may be the deviceperforming video functions, such as display/save/stream/live or videoedit/export, and the device realized in a computer or single videofunction. The video receiving device may be the device supporting or notsupporting HDR. The backend circuit may include a video bridgecontroller, and the video bridge controller may be designed to PCI-E BUSor USB. The video receiving device enables the video processing moduleby the video bridge controller to convert the HDR video input signal tothe SDR first video output signal, for example, the video receivingdevice transmits relevant command or information to the video bridgecontroller to control the video processing module for correspondingvideo processing by the video bridge controller.

Additionally, the video receiving device may receive the first videooutput signal and/or the second video output signal from the videoprocessing module by the backend interface, wherein the second videooutput signal is HDR signal. During actual operation, according to theHDR video input signal, the video processing module outputs the HDRsecond video output signal by pass-through. Of course, according to theHDR video input signal, the video processing module may generate the HDRsecond video output signal by video operation. These video operationsmay be, for example, change of resolution/frame rate or other videoparameters. Additionally, the video processing module may, for example,substantially synchronously output the SDR first video output signal andthe HDR second video output signal, or selectively output the SDR firstvideo output signal or the HDR second video output signal. The detaileddescription is given below by embodiments.

FIG. 1 shows the schematic diagram of the video signal conversion deviceof the first embodiment. As shown in FIG. 1, the video signal conversiondevice 11 is used together with the video transmitting device 12 and thevideo receiving device 13. The video signal conversion device 11includes a frontend interface 111, a video processing module 112 and abackend interface 113. The frontend interface 111 is coupled with thevideo transmitting device 12 to receive the video input signal from thevideo transmitting device 12, wherein the video input signal is HDRsignal. The video processing module 112 is coupled with frontendinterface 111. According to the video input signal, the video processingmodule 112 outputs the first video output signal V11, wherein, the firstvideo output signal V11 is SDR signal. The backend interface 113 iscoupled respectively with the video processing module 112 and the videoreceiving device 13, wherein, the video receiving device 13 receives thefirst video output signal V11 and the second video output signal V12from the video processing module 112, and the second video output signalV12 is HDR signal.

As according to the video input signal, the video processing module 112outputs the SDR first video output signal V11 and the HDR second videooutput signal V12 for the follow-up use by the video receiving device13, the video receiving device may be more suitable for a plurality ofvideo functions supporting or not supporting HDR. In this embodiment,for example, the SDR first video output signal V11 may be displayed onthe screen not supporting HDR, and the HDR second video output signalV12 may be stored for follow-up use. Of course, or, the HDR second videooutput signal V12 may be displayed on the screen supporting HDR, whilethe SDR first video output signal V11 may be stored for display in thescreen not supporting HDR.

According to the video input signal, the video processing module 112 mayoutput the HDR second video output signal V12. During actual operation,according to the HDR video input signal, the video processing module 112may output the HDR second video output signal V12 by pass-though. Ofcourse, according to the HDR video input signal, the video processingmodule 112 may generate the HDR second video output signal V12 by videooperation. This video operation may be, for example, change ofresolution rate, frame rate or other video parameters. Additionally, thevideo processing module 112 may, for example, substantiallysynchronously output the SDR video output signal V11 and the HDR secondvideo output signal V12. The “substantially synchronously” means smallertime difference within allowable range is deemed as “substantiallysynchronously”. In another embodiment, the video processing module 112may respectively output the SDR first video output signal V11 and theHDR second video output signal V12. The backend interface113 mayrespectively or substantially synchronously output the SDR first videooutput signal V11 and the HDR second video output signal V12 to thevideo receiving device 13.

According to actual requirement, the frontend interface includes areceiving device and a shunt, for example, as shown in FIG. 2, thefrontend interface 111 includes a HDMI receiving device 1111 receivingthe HDMI video input signal from the video transmitting device 12. Thevideo signal conversion device 11 may be cooperated with another videoreceiving device 14, wherein, the frontend interface 111 furtherincludes a HDMI shunt 1112, wherein the HDMI shunt 1112 is respectivelycoupled with the HDMI receiving device 1111, the video transmittingdevice 12 and the another video receiving device 14 and shunts the videoinput signal to the HDMI receiving device 1111 and another videoreceiving device 14. During actual operation, the HDMI shunt 1112 mayoutput the signal by pass-through, or change of the resolution/framerate or other video parameters, without limitation.

The video receiving device 13 may enable the video processing module 112by the backend interface 113 to convert the HDR video input signal tothe SDR first video output signal V11, for example, the video receivingdevice 13 transmits relevant command or information to the backendinterface 113 to control the video processing module 112 forcorresponding video processing by the backend interface 113.Additionally, the video receiving device 13 may also enable the videoprocessing module 112 to substantially synchronously or respectively theSDR first video output signal V11 and the HDR second video output signalV12 by the backend interface 113.

FIG. 3 shows the schematic diagram of the video signal conversion deviceaccording to the second embodiment. As shown in FIG. 3, the video signalconversion device 31 is cooperated with the video transmitting device 32and the video receiving device 33. The video signal conversion device 31includes a frontend interface 311, a FPGA video processor 312 and abackend circuit 313. The frontend interface 311 is electricallyconnected with video transmitting device 32 to receive the video inputsignal from the video transmitting device 32, wherein the video inputsignal is HDR signal. The FPGA video processor 312 is electricallyconnected with the frontend circuit 311. According to the video inputsignal, the FPGA video processor 312 outputs the first video outputsignal V31, wherein, the first video output signal V31 is SDR signal.The backend circuit 313 is electrically connected with the FPGA videoprocessor 312 and the video receiving device 33, wherein, the backendcircuit 313 includes a video bridge controller, and the video bridgecontroller is PCI-E BUS. The video receiving device 33 receives thePCI-E BUS first video output signal V31 from the FPGA video processor312 by the video bridge controller. In other embodiments, the FPGA videoprocessor 312 also may be a SoC video processor.

As mentioned above, according to the HDR video input signal, the FPGAvideo processor 312 outputs the SDR first video output signal V31 forfollow-up use by the video receiving device 33, such as storage,display, or series flow, etc., to more fully apply for supporting HDR.

The FPGA video processor 312 may selectively output the first videooutput signal V31 or the second video output signal V32, wherein thesecond video output signal V32 is HDR signal. In addition, according tothe video input signal, the FPGA video processor 312 outputs the HDRsecond video output signal V32. During actual operation, according toHDR video input signal, the FPGA video processor 312 outputs the HDRsecond video output signal V32 by pass-through. Of course, according tothe HDR video input signal, the FPGA video processor 312 may generatethe HDR second video output signal V32 by video operation. These videooperations may be, for example, change of resolution/frame rate or othervideo parameters. Additionally, the backend circuit 313 may, forexample, selectively output the SDR first video output signal V31 or theHDR second video output signal V32 to the video receiving device 33. Ofcourse, a buffer may be arranged on the backend circuit 313. Even if theFPGA video processor 312 selectively outputs the signal V31/V32, bytemporary storage in the buffer of the backend circuit 313, the SDRfirst video output signal V31 and the HDR second video output signal V32may be respectively or substantially synchronously outputted to thevideo receiving device 33.

In this embodiment, according to actual requirements, the frontendcircuit 311 may have different design, for example, including a HDMIreceiving device and a HDMI shunt. The receiving device and the shunthave been described in the previous embodiment, and not are repeated inthis embodiment.

The video receiving device 33 may enable the FPGA video processor 312 bythe video bridge controller of the backend circuit 313 to convert theHDR video input signal to the SDR first video output signal V31, forexample, the video receiving device 33 transmits relevant command orinformation to the video bridge controller of the backend circuit 313 tocontrol the FPGA video processor 312 for video processing by the videobridge controller of the backend circuit 313. In addition, the videoreceiving device 33 may enable the FPGA video processor 312 by the videobridge controller of the backend circuit 313 to selectively output theSDR first video output signal V31 or the HDR second video output signalV32.

FIG. 4 shows the schematic diagram of the video signal conversion deviceaccording to the third embodiment. As shown in FIG. 4, the video signalconversion device 41 is cooperated with the video transmitting device 42and the video receiving device 43. The video signal conversion device 41includes a frontend interface 411, a video processing hardware circuit412 and a backend interface circuit 413. The frontend circuit iselectrically connected with video transmitting device 42 to receive thevideo input signal from the video transmitting device 42, wherein thevideo input signal is HDR signal. The video processing hardware circuit412 is electrically connected with frontend circuit 411. According tothe video input signal, the video processing hardware circuit 412outputs the first video output signal V41, wherein, the first videooutput signal V41 is SDR signal. The backend interface circuit 413 iselectrically connected respectively with the video processing hardwarecircuit 412 and the video receiving device 43, wherein, the backendinterface circuit 413 includes a USB video bridge controller. The videoreceiving device 43 receives the first video output signal V41 from thevideo processor 412 by the USB video bridge controller.

Continued above, according to HDR video input signal, the videoprocessing hardware circuit 412 outputs the SDR first video outputsignal V31 for follow-up use by the video receiving device 43, such asstorage, display, or series flow, etc., to more fully apply forsupporting HDR.

In the embodiment, the video processing hardware circuit 412 mayselectively outputs the first video output signal V41 or the secondvideo output signal V42, wherein the second video output signal V42 isHDR signal. In addition, according to the video input signal, the videoprocessing hardware circuit 412 outputs the HDR second video outputsignal V42. During actual operation, according to HDR video inputsignal, the video processing hardware circuit 412 outputs the HDR secondvideo output signal V42 by pass-through. Of course, according to the HDRvideo input signal, the video processing hardware circuit 412 maygenerate the HDR second video output signal V42 by video operation.These video operations may be, for example, change of resolution/framerate or other video parameters. Additionally, the backend interfacecircuit 413 may, for example, selectively output the SDR first videooutput signal V41 or the HDR second video output signal V42 to the videoreceiving device 43. Of course, the signal may be temporarily stored ina buffer of the backend interface circuit 413. Even if the videoprocessing hardware circuit 412 selectively outputs the signal V41/V42,by temporary storage in the buffer of the backend interface circuit 413,the SDR first video output signal V41 and the HDR second video outputsignal V42 may be respectively or substantially synchronously outputtedto the video receiving device 43.

According to actual requirements, the frontend circuit 411may havedifferent design, for example, including a HDMI receiving device and aHDMI shunt. The receiving device and the shunt have been described inthe previous embodiment, and not are repeated in this embodiment.

The video receiving device 43 may enable the video processing hardwarecircuit 412 by the USB video bridge controller of the backend interfacecircuit 413 to convert the HDR video input signal to the SDR first videooutput signal V41, for example, the video receiving device 43 transmitsrelevant command or information to the video bridge controller of thebackend interface circuit 413 to control the video processing hardwarecircuit 412 for video processing by the USB video bridge controller ofthe backend interface circuit 413. In addition, the video receivingdevice 43 may enable the video processing hardware circuit 412 by thevideo bridge controller of the backend interface circuit 413 toselectively output the SDR first video output signal V41 or the HDRsecond video output signal V42.

FIG. 5 shows the schematic diagram of the video signal conversion deviceaccording to the fourth embodiment. As shown in FIG. 5, the video signalconversion device 51 is cooperated with the video transmitting device 52and the video receiving device 53. The video signal conversion device 51includes a frontend interface 511, a video processing module 512 and abackend interface 513. The frontend interface 511 is coupled with thevideo transmitting device 52 to receive the video input signal from thevideo transmitting device 51, wherein the video input signal is HDRsignal. The video processing module 512 is coupled with the frontendinterface 511. According to the video input signal, the video processingmodule 511 outputs the first video output signal V51, wherein, the firstvideo output signal V51 is SDR signal. The backend interface 513 iselectrically connected respectively with the video processing module 512and the video receiving device 53, wherein, the backend interface 513includes a video bridge controller 5131. The video receiving device 53receives the first video output signal V51 from the video processingmodule 512 by the video bridge controller 5131, wherein the video bridgecontroller 5131 is coupled with the frontend interface 511 to receivethe video metadata M10 corresponding to the video input signal from thefrontend interface 511 for use by the video receiving device 53.

Continued above, according to HDR video input signal, the videoprocessing module 512 outputs the SDR first video output signal V51 forfollow-up use by the video receiving device 53, such as storage,display, or series flow, etc., to more fully apply for supporting HDR.

In this embodiment, the video metadata M10 includes the HDR informationon HDR video input signal.

The video bridge controller 5131 may be a USB video bridge controller.The USB video bridge controller 5131 transmits the video metadata M10 tothe video receiving device 53 by a universal sequence. In thisembodiment, a USB video extension unit (UVC-Extension Unit) or a USBhuman-interface unit (USB-HID) transmits the video metadata M10 to thevideo receiving device 53. Additionally, according to actualrequirement, with USB framework, a channel is designed on the videoreceiving device 53 to transmit the video metadata M10 from the backendinterface 513 to the video receiving device 53, without limitation toUVC-Extension Unit or USB-HID.

According to conversion signal, the video processing module 512 mayconvert the HDR video input signal to the SDR first video output signal.The conversion information is related with the HDR information of thevideo metadata. During actual operation, the conversion information maybe obtained by the HDR information and the HDR-SDR conversion function.The conversion information may be known by comparison tables orreal-time operations. For the above conversion, actually, for example,it may be SDR video information obtained by adjusting the videoinformation video conversion formula of the conversion information.

In this embodiment, the video processing module 512 may selectivelyoutputs the first video output signal V51 or the second video outputsignal V52, wherein the second video output signal V52 is HDR signal.Additionally, according to the video input signal, the video processingmodule 512 outputs the second video output signal V52. During actualoperation, according to the HDR video input signal, the video processingmodule 512 outputs the HDR second video output signal V52 bypass-through. Of course, according to the HDR video input signal, thevideo processing module 512 may generate the HDR second video outputsignal V52 by video operation. These video operations may be, forexample, change of resolution/frame rate or other video parameters. Thebackend interface 513 may selectively output the SDR first video outputsignal V51 or the HDR second video output signal V52 to the videoreceiving device 53. Of course, a buffer is arranged on the backendinterface 513. Even if the video processing module 512 selectivelyoutputs the signal V51/V52, by temporary storage in the buffer of thebackend interface 513, the SDR first video output signal V51 and the HDRsecond video output signal V52 may be respectively or substantiallysynchronously outputted to the video receiving device 53.

The video receiving device 53 may enable the video processing module 512by the video bridge controller 5131 of the backend interface 513 toconvert the HDR video input signal to the SDR first video output signalV51, for example, the conversion information may be stored in the videobridge controller 5131. When the video receiving device 53 transmitsrelevant command or information to the USB video bridge controller 5131of the backend interface 513, the USB video bridge controller 5131transmits the conversion information to the video processing module 512so as to control the video processing module 512 for corresponding videoprocessing. Additionally, the video receiving device 53 may enable thevideo processing module 512 by the USB video bridge controller of thebackend interface 513 to selectively output the SDR first video outputsignal V51 or the HDR second video output signal V52.

In the embodiment, the frontend interface 511 may have different designaccording to actual requirement, for example, including a HDMI receivingdevice and a HDMI shunt. The receiving device and the shunt have beendescribed in the previous embodiment, and not are repeated in thisembodiment. Additionally, the video bridge controller 5131 may becoupled with the receiving device of the frontend interface 511 toreceive the video metadata M10 corresponding to the video input signalfrom the receiving device of the frontend interface 511.

FIG. 6 shows the schematic diagram of the video signal conversion deviceaccording to the fifth embodiment. As shown in FIG. 6, the video signalconversion device 21 is cooperated with the video transmitting device 22and the video receiving device 23. The video signal conversion device 21includes a frontend interface 211, a video processing module 212 and abackend interface 213. The frontend interface 211 is coupled with thevideo transmitting device 22 to receive the video input signal from thevideo transmitting device 22, wherein the video input signal is a signalwith a first frame rate. The video processing module 212 is coupled withthe frontend interface 211. According to the video input signal, thevideo processing module 212 outputs the first video output signal V21,wherein, the first video output signal V21 is a signal with a secondframe rate. The backend interface 213 is respectively coupled with thevideo processing module 212 and the video receiving device 23, wherein,the video receiving device 23 receives the first video output signal V21and the second video output signal V22 from the video processing module212 by the backend interface 213, wherein the second video output signalV22 is a signal with the first frame rate.

As according to the video input signal, the video processing module 212may output the first video output signal V21 with the second frame rateand the second video output signal V22 with the first frame rate forfollow-up use by the video receiving device 23, the video receivingdevice is more suitable for the video functions operatingsimultaneously. In this embodiment, for example, the first video outputsignal V21 with the second frame rate (e.g. low frame rate) may be usedto save bandwidth by series flow, while the second video output signalV22 with the first frame rate (e.g. high frame rate) may be stored forthe user to use the high frame rate video.

The first frame rate may be higher than the second frame rate, which isnot deemed limited. In this embodiment, the first frame rate is equal toor higher than 60 frames/s (FPS) while the second frame rate equal to orlower than 60 frames/s (FPS).

According to the video input signal, the video processing module 212outputs the second video output signal V22 with the first frame rate.During actual operation, according to the video input signal with thefirst frame rate, the video processing module 212 outputs the secondvideo output signal V22 with the first frame rate by pass-through. Ofcourse, according to the video input signal with the first frame rate,the video processing module 212 may generate the second video outputsignal V22 with the first frame rate by video operation. These videooperations may be, for example, change of resolution/frame rate or othervideo parameters. Additionally, the video processing module 212 may, forexample, substantially synchronously output the first video outputsignal V21 with the second frame rate and the second video output signalV22 with the first frame rate. The “substantially synchronously” meanssmaller time difference within allowable range is deemed as“substantially synchronously”. In another embodiment, the videoprocessing module 212 may respectively output the first video outputsignal V21 with the second frame rate and the second video output signalV22 with the first frame rate. The backend interface 213 mayrespectively or substantially synchronously output the first videooutput signal V21 with the second frame rate and the second video outputsignal V22 with the first frame rate to the video receiving device 23.

The video receiving device 23 may enable the video processing module 212by the backend interface 213 to convert the video input signal with thefirst frame rate to the first video output signal V21 with the secondframe rate, for example, the video receiving device 23 transmitsrelevant command or information to the backend interface 113 to controlthe video processing module 212 for corresponding video processing bythe backend interface 213. Additionally, the video receiving device 23enables the video processing module 212 to substantially synchronouslyor respectively output the first video output signal V21 with the secondframe rate and the second video output signal V22 with the first framerate by the backend interface 213.

In summary, according to the technical content of the invention, thevideo signal conversion device can more fully solve the problems thatthe backend video receiving end does not support HDR or the backendvideo receiving end requires SDR.

Even though numerous characteristics and advantages of certain inventiveembodiments have been set out in the foregoing description, togetherwith details of the structures and functions of the embodiments, thedisclosure is illustrative only. Changes may be made in detail,especially in matters of arrangement of parts, within the principles ofthe present disclosure to the full extent indicated by the broad generalmeaning of the terms in which the appended claims are expressed.

What is claimed is:
 1. A video signal conversion device, which iscooperated with a video transmitting device, wherein the video signalconversion device is coupled with the video transmitting device forreceiving a video input signal transmitted from the video transmittingdevice, wherein the video input signal is a signal with a first framerate, comprising: a video processing module, which output a first videooutput signal in accordance with the video input signal with the firstframe rate, wherein the video processing module converts the first framerate to a second frame rate being smaller than the first frame rate, sothat the first video output signal is a signal with the second framerate; and wherein the video processing module substantiallysynchronously output the first video output signal with the second framerate and a second video output signal, wherein the second video outputsignal is a signal with the first frame rate, wherein the first framerate is greater than the second frame rate.
 2. The video signalconversion device of claim 1, wherein the video processing moduleoutputs the second video output signal with the first frame rate bypass-through.
 3. The video signal conversion device of claim 2, whereinthe video signal conversion device is cooperated with a video receivingdevice, wherein the video receiving device substantially synchronouslyreceives the first video output signal and the second video outputsignal outputted by the video processing module of the video signalconversion device.
 4. The video signal conversion device of claim 1,wherein the first video output signal with the second frame rate is tosave bandwidth by series flow, while the second video output signal withthe first frame rate is stored for the user to use the high frame ratevideo.
 5. The video signal conversion device of claim 1, wherein thefirst frame rate is equal to or more than 60 frames/s (FPS), the secondframe rate is equal to or less than 60 frames/s (FPS).
 6. The videosignal conversion device of claim 1, wherein the video processing modulegenerates the second video output signal with the first frame rate byvideo operation, where the video operations is change of resolutionrate, frame rate or other video parameters.
 7. The video signalconversion device of claim 1, wherein the first video output signal withthe second frame rate is SDR signal and the second video output signalwith the first frame rate is HDR signal.
 8. The video signal conversiondevice of claim 1, wherein the video receiving device transmits relevantcommand or information to the video signal conversion device to controlthe video processing module for corresponding video processing, wherethe video processing module converts the video input signal with thefirst frame rate to the first video output signal with the second framerate.